Intel has gone through a major period of manufacturing expansion for the company in recent years. While the recent announcements of new facilities in Ohio and Germany have understandably drawn a lot of attention – especially considering their importance to Intel’s Foundry Services plans – Intel is still working to expand its existing facilities for its own use. The company’s development of next-generation EUV and gate-all-around transistors (RibbonFET) requires not only the creation and refinement of the underlying technology, but also more space. A lot of that.
To that end, Intel is hosting a grand opening ceremony for the Mod3 expansion of D1X, the company’s primary development factory, in Oregon today. The expansion, first announced in 2019, is the third such mod (module) and the second expansion for Intel’s main development factory to be built since the D1X was first constructed in 2010 to make something of an event out of it, including bringing about the Governor of Oregon to show off its $3 billion investment.
But fanfare aside, the latest fab mod is really important for Intel: Not only does it add another 270,000 square feet of clean room space to the facility — expanding D1X by about 20% — but it’s the only fab module that’s big enough to support the High Numerical Aperture (High NA) EUV tool that Intel will use starting with the 18A process. ASML’s upcoming TWINSCAN EXE:5200 EUV tool is said to be the most powerful yet, but it’s also quite a bit larger than the NXE 3000 series EUV tools that Intel uses for its first-generation (Intel 4 /Intel 3) used. It’s so big that the D1X’s ceiling is too low to fit in the machine, let alone the floor that supports its weight.
Size comparison: ASML EUV machines with normal and high NA
As a result, Mod3 was built in no small part to match this massive machine. Intel doesn’t expect to ship the machine for a couple of years, but they’ve had to start preparing years in advance just to get to this point.
Although D1X-Mod3 is only officially declared open today, Intel has already moved critical tools to Mod3 since last August. As a result, today’s opening is something of a ceremonial launch for the mod, as parts of it are already in place (if not already in use). But despite that lead, the company expects to roll out tools for another year, according to Intel, especially as they roll out the remaining tools with lower priority.
Coincidentally, our own Dr. Ian Cutress got the chance to see D1X in all its glory when he toured the facility late last year. At this point, Intel was already in the final stages of completing the Mod3 extension and was releasing EUV machines as part of the development of the Intel 4 and Intel 3 process nodes, Intel’s first EUV node. For more information on D1X and what’s going on there, see this article.
A number of EUV machines at D1X
Finally, today, in addition to officially opening the Mod3 expansion, Intel also takes the opportunity to rebrand the 450-acre campus that houses D1X. Intel’s Ronler Acres campus has been the center of Intel’s fabulous R&D efforts for decades and is home to Intel’s older D1 development fabs such as D1B, D1C and D1D in addition to D1X. In recognition of all the important research and development taking place at the site, Intel is renaming it after co-founder Gordon Moore, one of the key figures behind the development of Intel’s earliest technologies. The newly renamed campus will now pass Gordon Moore Park at Ronler Acres, or Gordon Moore Park for short. And despite the many (many) things that have been named after Moore over the years, from laws and buildings to awards and medals, this is the biggest thing named after Moore (so far) since it’s the first time is that an entire campus was named after the lamp.
Intel Roadmap Update: Intel 18A postponed to H2 2024
In addition to briefing the press on the D1X Mod3 launch, Intel also used its recent press event to update everyone on the latest updates on Intel’s development roadmap. In fact, nothing new here — all of which was first announced during Intel’s 2022 Investor Meeting back in February. However, this is the first time that Intel has updated the trade press and not investors on the current status of its development efforts.
The big news here is that Intel is formally bringing forward the start date for manufacturing on the Intel 18A node. Intel’s second-generation “Angstrom” node was originally expected in 2025; but now the company is increasing that by half a year to the second half of 2024.
As a result, Intel’s roadmap now looks like this:
With the company already gearing up for its first EUV process, Intel 4, later this year, Intel’s roadmap looks very compressed from the second half of 2023. In the second half of this year, Intel 3 will go into production, which is Intel’s enhanced EUV process. In the meantime, possibly as early as 6 months later, Intel 20A will go into production. 20A is Intel’s first “Angstrom” node, incorporating their “RibbonFET” gate-all-around style FinFets and PowerVias.
But if all goes according to plan, 20A will appear to be a relatively short-lived node due to the movement of 18A. Intel’s second-generation Angstrom node, which will feature an updated ribbon design and other improvements to Intel’s GAA manufacturing technology. With 18A remaining the furthest node on Intel’s manufacturing roadmap, the company remains relatively silent on anything new that 18A will bring, but it remains the point at which Intel plans to restore the undisputed lead of the chip manufacturing industry.
According to Intel, 18A development has progressed so well that the company’s R&D efforts have now met or exceeded all development milestones, giving the company confidence that it will start manufacturing products based on it by the end of 2024 instead of 2025 of the process node can begin as initially planned.
However, one consequence of the introduction of 18A is that Intel is now definitely going into initial production of 18A without all of its high NA machines. 18A remains the process node where high-NA machines will debut, but with the TWINSCAN EXE 5200 not expected to be available until 2025, this means Intel must now use its existing 3000-series machines to deliver the 18A boost production. Up until this latest development, Intel had presented high-NA machines and 18A as being tied at the waist, so whether that was always the case or not, now that’s clearly not the case.
What that means in turn for 18A production remains to be seen. Since Intel can use its normal (non-HA) machines for 18A, the biggest advantages of the high-NA machines were probably the throughput, which thanks to the higher accuracy of high-NA allowed Intel to process wafers with little (or no) to process multi-patterning. The most likely outcome seems to be that Intel will be able to produce 18A in 2024, and maybe even in decent quantities, but that they won’t be able to get into Intel’s high-volume manufacturing until the first high- NA machine will be available in 2025.
And as always, it should be noted that Intel’s production roadmap dates are the earliest dates that a new process node will enter production, rather than the date that hardware built on the technology hits shelves. Even if 18A launches in H2’24 as planned now, 2025 could well take a few months before the first products are in customer hands, especially if Intel launches in the later part of that window. All of this is a likely bet given the size of these launch windows and Intel’s own history as Intel has rarely brought new products/technology to market early in a release window.
Finally, Intel’s development brief also included confirmation that Intel is employing a purely internal “test-risk-reduction” node as part of its development process for its PowerVia technology. The purpose of the test node is to decouple the full 20A risk by allowing Intel to design and test PowerVias separately from RibbonFETs. In this case, the test node uses Intel’s proven FinFET technology in the front end and a trial version of PowerVia in the back end. No such node has been announced for RibbonFETs, but even if none exists, not having to debug first-gen PowerVia on 20A alongside the RibbonFETs is still a process simplification, as it allows Intel to track both elements semi-independently, and learn along the way from both.
This is a significant change from how Intel has historically designed major new manufacturing nodes, and even they are the first to admit it. Intel’s 10nm problems were caused in large part by bundling too many technology changes at once, combined with very aggressive feature size reduction. Breaking these things down into smaller, more frequent updates to manufacturing nodes was one way Intel mitigated that risk going forward. And now with an internal test node for PowerVia development, they are aiming for even more risk mitigation to be able to roll out both RibbonFETs and PowerVia together as part of Intel 20A in the first half of 2024.